[PATCH] D80434: [AMDGPU] Reject moving PHI to VALU if the only VGPR input originated from move immediate

[Alexander via Phabricator via llvm-commits]

alex-t updated this revision to Diff 265786.
alex-t added a comment.

Explicit check move source operand to be immediate.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80434/new/

https://reviews.llvm.org/D80434

Files:
  llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
  llvm/test/CodeGen/AMDGPU/phi-vgpr-input-moveimm.mir


Index: llvm/test/CodeGen/AMDGPU/phi-vgpr-input-moveimm.mir
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AMDGPU/phi-vgpr-input-moveimm.mir
@@ -0,0 +1,32 @@
+# RUN: llc  -march=amdgcn -verify-machineinstrs -run-pass=si-fix-sgpr-copies -o - %s | FileCheck -check-prefix=GCN %s
+---
+# GCN_LABEL: bb.2:
+# GCN-NOT: %{{[0-9]+}}:vgpr_32 = PHI %{{[0-9]+}}, %bb.3, %{{[0-9]+}}, %bb.1 
+# GCN:     %{{[0-9]+}}:sreg_32 = PHI %{{[0-9]+}}, %bb.3, %{{[0-9]+}}, %bb.1 
+
+name:            phi_moveimm_input
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    successors: %bb.1
+    liveins: $sgpr0, $sgpr1
+
+    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    
+    %4:sreg_32 = COPY $sgpr0
+    %5:sreg_32 = COPY $sgpr1
+
+  bb.1:
+
+    successors: %bb.2
+    %2:sreg_32 =  S_ADD_U32 %4, %5, implicit-def $scc
+    S_BRANCH %bb.2
+  bb.2:
+    successors: %bb.3
+    %3:sreg_32 = PHI %1, %bb.3, %2, %bb.1
+    S_BRANCH %bb.3
+  bb.3:
+    successors: %bb.2
+    %1:sreg_32 = COPY %0 
+    S_BRANCH %bb.2
+...
Index: llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
+++ llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
@@ -835,8 +835,13 @@
     }
     else if (Def->isCopy() &&
       TRI->isVectorRegister(*MRI, Def->getOperand(1).getReg())) {
-      hasVGPRInput = true;
-      break;
+      Register SrcReg = Def->getOperand(1).getReg();
+      MachineInstr *SrcDef = MRI->getVRegDef(SrcReg);
+      if (SrcDef &&
+          !(SrcDef->isMoveImmediate() && SrcDef->getOperand(1).isImm())) {
+        hasVGPRInput = true;
+        break;
+      }
     }
   }
 


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