[PATCH] D80316: [HardwareLoops] Intrinsic LangRef descriptions

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

> Probably slightly better is to let llvm.set.loop.iterations produce a value, so that it probably kind of models a move of the iteration count to the iteration count register, which can be picked up.

If you were actually looking at changing this, probably simplest would be to kill off llvm.loop.decrement completely, and convert the PPC hardware loops to work more like the ARM hardwareloops.  Without llvm.loop.decrement, each intrinsic has an obvious conversion: llvm.set.loop.iterations is a no-op, llvm.test.set.loop.iterations is an icmp, llvm.loop.decrement.reg is a sub.



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Comment at: llvm/docs/LangRef.rst:14835
+specific instructions, or revert the hardware-loop to a normal loop if target
+specific restriction are not met and a hardware-loop can't be generated.
+
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Thinking about it a bit more, I'm not sure we really want to promise these are stable.  They're sort of an internal implementation detail, and frontend and mid-level optimizations don't really have any business generating them.

Maybe explicitly state these may be modified in the future, and are not intended to be used outside the backend.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80316/new/

https://reviews.llvm.org/D80316