[PATCH] D79806: [CodeGen] Specify meaning of ISD opcodes for scalable vectors

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added a comment.

> I think I'd rather use a different opcode for the cases where you're mixing fixed/scalable vectors. There are some potentially weird edge cases to deal with there, and the existing code is much more likely to blow up. For example, can you extract an <8 x i32> from a <vscale x 4 x i32>? Does it matter if we know that vscale is 2 or more for the current subtarget?

We discussed this in the previous SVE sync-up call, but just to clarify: extracting a `<8 x i32>` from a `<vscale x 4 x i32>` would be a valid use-case for the same reason as allowing to extract an element from index `8` from e.g. a `<vscale x 4 x i32>`. I've called that out explicitly in the description of EXTRACT_VECTOR_ELT.


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