[PATCH] D79283: [PowerPC] Add missing handling for half precision
Stefan Pintilie via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 21 11:21:55 PDT 2020
stefanp accepted this revision as: stefanp.
stefanp added a comment.
This revision is now accepted and ready to land.
One minor nit. Otherwise LGTM.
================
Comment at: llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll:202
declare i16 @llvm.convert.to.fp16.f32(float)
+define void @test_load_store(half* %in, half* %out) #0 {
+; P8-LABEL: test_load_store:
----------------
All of these functions are marked as `nounwind` (due to the `#0`) do they need to be marked as such?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D79283/new/
https://reviews.llvm.org/D79283
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