[PATCH] D80027: Trivial fix for instruction with more than one destination in modulo peeler.

[Thomas via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG20c0527af744: [ModuloSchedule] Trivial fix for instruction with more than one destination in… (authored by ThomasR).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80027/new/

https://reviews.llvm.org/D80027

Files:
  llvm/lib/CodeGen/ModuloSchedule.cpp


Index: llvm/lib/CodeGen/ModuloSchedule.cpp
===================================================================
--- llvm/lib/CodeGen/ModuloSchedule.cpp
+++ llvm/lib/CodeGen/ModuloSchedule.cpp
@@ -1658,8 +1658,8 @@
     // we don't need the phi anymore.
     if (getStage(Def) == Stage) {
       Register PhiReg = MI.getOperand(0).getReg();
-      MRI.replaceRegWith(MI.getOperand(0).getReg(),
-                         Def->getOperand(0).getReg());
+      assert(Def->findRegisterDefOperandIdx(MI.getOperand(1).getReg()) != -1);
+      MRI.replaceRegWith(MI.getOperand(0).getReg(), MI.getOperand(1).getReg());
       MI.getOperand(0).setReg(PhiReg);
       PhiToDelete.push_back(&MI);
     }


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