[llvm] 20c0527 - [ModuloSchedule] Trivial fix for instruction with more than one destination in modulo peeler.

Thomas Raoux via llvm-commits llvm-commits at lists.llvm.org
Thu May 21 08:18:20 PDT 2020


Author: Thomas Raoux
Date: 2020-05-21T08:14:42-07:00
New Revision: 20c0527af7449d7c22261f9bc88b0ee391bdbad8

URL: https://github.com/llvm/llvm-project/commit/20c0527af7449d7c22261f9bc88b0ee391bdbad8
DIFF: https://github.com/llvm/llvm-project/commit/20c0527af7449d7c22261f9bc88b0ee391bdbad8.diff

LOG: [ModuloSchedule] Trivial fix for instruction with more than one destination in modulo peeler.

When moving an instruction into a block where it was referenced by a phi when peeling,
refer to the phi's register number and assert that the instruction has it in its destinations.
This way, it also covers instructions with more than one destination.

Patch by Hendrik Greving!

Differential Revision: https://reviews.llvm.org/D80027

Added: 
    

Modified: 
    llvm/lib/CodeGen/ModuloSchedule.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/ModuloSchedule.cpp b/llvm/lib/CodeGen/ModuloSchedule.cpp
index 65dc11e22fe2..944a295ac26d 100644
--- a/llvm/lib/CodeGen/ModuloSchedule.cpp
+++ b/llvm/lib/CodeGen/ModuloSchedule.cpp
@@ -1658,8 +1658,8 @@ void PeelingModuloScheduleExpander::moveStageBetweenBlocks(
     // we don't need the phi anymore.
     if (getStage(Def) == Stage) {
       Register PhiReg = MI.getOperand(0).getReg();
-      MRI.replaceRegWith(MI.getOperand(0).getReg(),
-                         Def->getOperand(0).getReg());
+      assert(Def->findRegisterDefOperandIdx(MI.getOperand(1).getReg()) != -1);
+      MRI.replaceRegWith(MI.getOperand(0).getReg(), MI.getOperand(1).getReg());
       MI.getOperand(0).setReg(PhiReg);
       PhiToDelete.push_back(&MI);
     }


        


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