[PATCH] D80316: [HardwareLoops] Intrinsic descriptions

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

Changes outside LangRef LGTM; please commit separately.



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Comment at: llvm/docs/LangRef.rst:14855
+(vector) loop will execute. They are placed in the loop preheader, and are marked
+as ``IntrNoDuplicate`` to avoid optimizers duplicating these instructions.
+
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I think each of these intrinsics needs a "semantics" section that specifies the bare semantics of each intrinsic, without mentioning anything about loops/control flow, assuming that's possible.


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Comment at: llvm/docs/LangRef.rst:14874
+      declare void @llvm.test.set.loop.iterations.i32(i32)
+      declare void @llvm.tetst.set.loop.iterations.i64(i64)
+
----------------
Signature here is wrong?


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