[PATCH] D80276: [Alignment] Fix misaligned interleaved loads

Guillaume Chatelet via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 20 07:35:20 PDT 2020


gchatelet updated this revision to Diff 265236.
gchatelet added a comment.

- Fixed Bits vs Bytes error


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80276/new/

https://reviews.llvm.org/D80276

Files:
  llvm/lib/Target/X86/X86InterleavedAccess.cpp
  llvm/test/Transforms/InterleavedAccess/X86/interleaved-accesses-64bits-avx.ll
  llvm/test/Transforms/InterleavedAccess/X86/interleavedLoad.ll
  llvm/test/Transforms/InterleavedAccess/X86/interleavedStore.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D80276.265236.patch
Type: text/x-patch
Size: 23429 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200520/8520b1e7/attachment.bin>


More information about the llvm-commits mailing list