[PATCH] D80231: [llvm] [CodeGen] [X86] Fix issues with v4i1 instruction selection

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/test/CodeGen/X86/pr45995-2.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -O3  --x86-asm-syntax=intel -mtriple=x86_64-grtev4-linux-gnu -march=x86-64 -mcpu=skylake-avx512 -mattr=fma,avx512f < %s | FileCheck %s
+
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Both these run args look over constrained - llc -mtriple=x86_64-- -mattr=+avx512dq,+avx512vl might be enough?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80231/new/

https://reviews.llvm.org/D80231