[PATCH] D80269: [Power9] Add addi post-ra scheduling heuristic

Qing Shan Zhang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 19 22:30:22 PDT 2020


steven.zhang created this revision.
steven.zhang added reviewers: jsji, PowerPC.
Herald added subscribers: wuzish, javed.absar, kbarton, hiraditya, nemanjai, MatzeB.
Herald added a project: LLVM.

The instruction addi is usually used to post increase the loop indvar, which looks like this:

  label_X:
   load x, base(i)
   ...
   y = op x
   ...
   i = addi i, 1
   goto label_X

However, for PowerPC, if there are too many vsx instructions that between `y = op x` and ` i = addi i, 1`, it will use all the hw resource that block the execution of `i = addi, i, 1`, which result in the stall of the load instruction in next iteration.  So, a heuristic is added to move the `addi` as early as possible if other heuristic didn't apply to avoid the starve.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D80269

Files:
  llvm/include/llvm/CodeGen/MachineScheduler.h
  llvm/lib/Target/PowerPC/PPCMachineScheduler.cpp
  llvm/lib/Target/PowerPC/PPCMachineScheduler.h
  llvm/test/CodeGen/PowerPC/loop-instr-form-prepare.ll
  llvm/test/CodeGen/PowerPC/pr42492.ll
  llvm/test/CodeGen/PowerPC/sched-addi.ll
  llvm/test/CodeGen/PowerPC/sms-cpy-1.ll
  llvm/test/CodeGen/PowerPC/sms-phi-1.ll
  llvm/test/CodeGen/PowerPC/sms-simple.ll
  llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll

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