[PATCH] D77448: [PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
Victor Huang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 19 13:10:53 PDT 2020
NeHuang added inline comments.
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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:14068
+ ShuffV[i] += HalfVec;
+ else if (Idx >= RHSMinIdx && Idx < RHSMaxIdx)
+ ShuffV[i] += HalfVec;
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nit: Is it possible to combine line 14068 and 14066 into one if check since the two operations are same?
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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:14106
+// because the latter can be matched to a single instruction merge.
+// Furthermore, SCALAR_TO_VECTOR on Little endian always involves a permute
+// to put the value into element zero. Adjust the shuffle mask so that the
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nit: Little -> little
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D77448/new/
https://reviews.llvm.org/D77448
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