[PATCH] D80127: [ARM][MachineOutliner] Add LR RegSave mode.

Sam Parker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 19 07:00:39 PDT 2020


samparker added inline comments.


================
Comment at: llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp:5653
+        Reg != ARM::LR &&  // LR is not reserved, but don't use it.
+        Reg != ARM::R12 && // R12 is not guaranteed to be preserved.
+        C.LRU.available(Reg) && C.UsedInSequence.available(Reg))
----------------
Is PC already covered by getReservedRegs or do we need to check here too? Also do you mean tGPR? That seems too restrictive for Thumb2. I think it would be better, easier and safer to just use the rGPR for both.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80127/new/

https://reviews.llvm.org/D80127





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