[PATCH] D80052: [docs] Sketch outline for HowToUpdateDebugInfo.rst

[Djordje Todorovic via Phabricator via llvm-commits]

djtodoro added inline comments.


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Comment at: llvm/docs/HowToUpdateDebugInfo.rst:21
+
+IR-level transformations
+========================
----------------
A TODO on changing DIMeatadata (such as introducing a DIFlag etc) by describing bitcode backward compatibility etc. ?


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Comment at: llvm/docs/HowToUpdateDebugInfo.rst:232
+   be precise enough), moving the test to its own file is preferred.
+
+MIR-level transformations
----------------
vsk wrote:
> aprantl wrote:
> > Do we want to add a section on SelectionDAG & GlobalISel, DAGCombine, etc?
> The info about MIR should generally carry over to GIsel. This probably does need a separate section for SelectionDAG, but I'm not sure how to structure that, so I'll leave it as TODO as well.
I guess we can add TODOs for the sections on VirtRegRewriter/LiveDebugVariables; LiveDebugValues; AsmPrinter(DwarfDebug;DwarfExpression); as well.


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