[llvm] ad4f196 - [NFC] [PowerPC] Refresh fma-mutate.ll using script

[Qiu Chaofan via llvm-commits]

Author: Qiu Chaofan
Date: 2020-05-19T13:39:58+08:00
New Revision: ad4f196e25c091922b8037d313984fcde3e23088

URL: https://github.com/llvm/llvm-project/commit/ad4f196e25c091922b8037d313984fcde3e23088
DIFF: https://github.com/llvm/llvm-project/commit/ad4f196e25c091922b8037d313984fcde3e23088.diff

LOG: [NFC] [PowerPC] Refresh fma-mutate.ll using script

This is a clean-up after D78989. The old comments are out of date.

Added: 
    

Modified: 
    llvm/test/CodeGen/PowerPC/fma-mutate.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/PowerPC/fma-mutate.ll b/llvm/test/CodeGen/PowerPC/fma-mutate.ll
index f3dc1c6c8ab4..a1e3473edf22 100644
--- a/llvm/test/CodeGen/PowerPC/fma-mutate.ll
+++ b/llvm/test/CodeGen/PowerPC/fma-mutate.ll
@@ -1,27 +1,46 @@
-; Test several VSX FMA mutation opportunities.  The first one isn't a
-; reasonable transformation because the killed product register is the
-; same as the FMA target register.  The second one is legal.  The third
-; one doesn't fit the feeding-copy pattern.
-
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx -disable-ppc-vsx-fma-mutation=false | FileCheck %s
-target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
-target triple = "powerpc64-unknown-linux-gnu"
 
 declare double @llvm.sqrt.f64(double)
 
+; Test several VSX FMA mutation opportunities.
+
+; This is reasonable transformation since it eliminates extra register copy.
 define double @foo3_fmf(double %a) nounwind {
-; CHECK: @foo3_fmf
-; CHECK-NOT: fmr
-; CHECK: xsmaddmdp
-; CHECK: xsmaddadp
+; CHECK-LABEL: foo3_fmf:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xsabsdp 0, 1
+; CHECK-NEXT:    addis 3, 2, .LCPI0_2 at toc@ha
+; CHECK-NEXT:    lfd 2, .LCPI0_2 at toc@l(3)
+; CHECK-NEXT:    xscmpudp 0, 0, 2
+; CHECK-NEXT:    xxlxor 0, 0, 0
+; CHECK-NEXT:    blt 0, .LBB0_2
+; CHECK-NEXT:  # %bb.1:
+; CHECK-NEXT:    xsrsqrtedp 0, 1
+; CHECK-NEXT:    addis 3, 2, .LCPI0_0 at toc@ha
+; CHECK-NEXT:    lfs 3, .LCPI0_0 at toc@l(3)
+; CHECK-NEXT:    addis 3, 2, .LCPI0_1 at toc@ha
+; CHECK-NEXT:    lfs 4, .LCPI0_1 at toc@l(3)
+; CHECK-NEXT:    xsmuldp 2, 1, 0
+; CHECK-NEXT:    xsmaddmdp 2, 0, 3
+; CHECK-NEXT:    xsmuldp 0, 0, 4
+; CHECK-NEXT:    xsmuldp 0, 0, 2
+; CHECK-NEXT:    xsmuldp 1, 1, 0
+; CHECK-NEXT:    xsmaddadp 3, 1, 0
+; CHECK-NEXT:    xsmuldp 0, 1, 4
+; CHECK-NEXT:    xsmuldp 0, 0, 3
+; CHECK-NEXT:  .LBB0_2:
+; CHECK-NEXT:    fmr 1, 0
+; CHECK-NEXT:    blr
   %r = call reassoc afn ninf double @llvm.sqrt.f64(double %a)
   ret double %r
 }
 
 define double @foo3_safe(double %a) nounwind {
-; CHECK: @foo3_safe
-; CHECK-NOT: fmr
-; CHECK: xssqrtdp
+; CHECK-LABEL: foo3_safe:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xssqrtdp 1, 1
+; CHECK-NEXT:    blr
   %r = call double @llvm.sqrt.f64(double %a)
   ret double %r
 }