[PATCH] D79311: [lld-macho] Support X86_64_RELOC_SIGNED_{1,2,4}
Fangrui Song via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon May 18 15:45:17 PDT 2020
MaskRay marked an inline comment as done.
MaskRay added inline comments.
================
Comment at: lld/MachO/Arch/X86_64.cpp:53
+ case X86_64_RELOC_SIGNED_2:
+ case X86_64_RELOC_SIGNED_4:
case X86_64_RELOC_GOT_LOAD:
----------------
thakis wrote:
> Is this correct? Looking at `lld/lib/ReaderWriter/MachO/ArchHandler_x86_64.cpp`, it has this handy table:
>
> ```
> ripRel32, /// ex: movq _foo(%rip), %rax
> ripRel32Minus1, /// ex: movb $0x12, _foo(%rip)
> ripRel32Minus2, /// ex: movw $0x1234, _foo(%rip)
> ripRel32Minus4, /// ex: movl $0x12345678, _foo(%rip)
> ripRel32Anon, /// ex: movq L1(%rip), %rax
> ripRel32Minus1Anon, /// ex: movb $0x12, L1(%rip)
> ripRel32Minus2Anon, /// ex: movw $0x1234, L1(%rip)
> ripRel32Minus4Anon, /// ex: movw $0x12345678, L1(%rip)
>
> ```
>
> and it maps SIGNED(_1/2/4) to these and then it does relocations with offsets for the offset relocation types.
This matches my observation of ld64 and X86MachObjectWriter.cpp
Reading the implicit addend back may seem weird but I believe `X86_64_RELOC_SIGNED_1` requires the implicit addend to be 1.
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https://reviews.llvm.org/D79311/new/
https://reviews.llvm.org/D79311
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