[PATCH] D80158: [AMDGPU] Fix for the lost CarryOut/CarryIn register operands in S_ADD/SUB_CO_PSEUDO.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:5183
+      const TargetRegisterClass *CarryInRC = MRI.getRegClass(CarryInReg);
+      if (CarryInRC != CarryRC) {
+        Register NewCarryReg = MRI.createVirtualRegister(CarryRC);
----------------
I'm pretty sure there's a constrain to regclass helper that will do this for you


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80158/new/

https://reviews.llvm.org/D80158