[PATCH] D80131: [x86] favor vector constant load to avoid GPR to XMM transfer, part 2
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon May 18 11:21:28 PDT 2020
RKSimon added inline comments.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:35802
+ return DAG.getLoad(VT, DL, DAG.getEntryNode(), CP, MPI, Alignment,
+ MachineMemOperand::MOLoad);
+ }
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Would creating X86ISD::VZEXT_LOAD be better? We'd need to zext i8/i16 cases to i32 constant pool entries but we'd avoid the upper zero constants.
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https://reviews.llvm.org/D80131/new/
https://reviews.llvm.org/D80131
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