[llvm] 364c595 - [SVE] Ignore scalable vectors in InterleavedLoadCombinePass
David Sherwood via llvm-commits
llvm-commits at lists.llvm.org
Mon May 18 08:36:33 PDT 2020
Author: David Sherwood
Date: 2020-05-18T16:35:55+01:00
New Revision: 364c595403c00431374dbcc965b6117e33a7f140
URL: https://github.com/llvm/llvm-project/commit/364c595403c00431374dbcc965b6117e33a7f140
DIFF: https://github.com/llvm/llvm-project/commit/364c595403c00431374dbcc965b6117e33a7f140.diff
LOG: [SVE] Ignore scalable vectors in InterleavedLoadCombinePass
I have changed the pass so that we ignore shuffle vectors with
scalable vector types, and replaced VectorType with FixedVectorType
in the rest of the pass. I couldn't think of an easy way to test
this change, since for scalable vectors we shouldn't be using
shufflevectors for interleaving. This change fixes up some
type size assert warnings I found in the following test:
CodeGen/AArch64/sve-intrinsics-int-arith-imm.ll
Differential Revision: https://reviews.llvm.org/D79700
Added:
Modified:
llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp b/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
index 64a8ff31624c..a0ed5eea0651 100644
--- a/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
+++ b/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
@@ -673,9 +673,9 @@ struct VectorInfo {
ElementInfo *EI;
/// Vector Type
- VectorType *const VTy;
+ FixedVectorType *const VTy;
- VectorInfo(VectorType *VTy)
+ VectorInfo(FixedVectorType *VTy)
: BB(nullptr), PV(nullptr), LIs(), Is(), SVI(nullptr), VTy(VTy) {
EI = new ElementInfo[VTy->getNumElements()];
}
@@ -735,7 +735,7 @@ struct VectorInfo {
if (!Op)
return false;
- VectorType *VTy = dyn_cast<VectorType>(Op->getType());
+ FixedVectorType *VTy = dyn_cast<FixedVectorType>(Op->getType());
if (!VTy)
return false;
@@ -785,8 +785,8 @@ struct VectorInfo {
/// \returns false if no sensible information can be gathered.
static bool computeFromSVI(ShuffleVectorInst *SVI, VectorInfo &Result,
const DataLayout &DL) {
- VectorType *ArgTy = dyn_cast<VectorType>(SVI->getOperand(0)->getType());
- assert(ArgTy && "ShuffleVector Operand is not a VectorType");
+ FixedVectorType *ArgTy =
+ cast<FixedVectorType>(SVI->getOperand(0)->getType());
// Compute the left hand vector information.
VectorInfo LHS(ArgTy);
@@ -1201,7 +1201,7 @@ bool InterleavedLoadCombineImpl::combine(std::list<VectorInfo> &InterleavedLoad,
Type *ETy = InterleavedLoad.front().SVI->getType()->getElementType();
unsigned ElementsPerSVI =
InterleavedLoad.front().SVI->getType()->getNumElements();
- VectorType *ILTy = VectorType::get(ETy, Factor * ElementsPerSVI);
+ FixedVectorType *ILTy = FixedVectorType::get(ETy, Factor * ElementsPerSVI);
SmallVector<unsigned, 4> Indices;
for (unsigned i = 0; i < Factor; i++)
@@ -1265,8 +1265,11 @@ bool InterleavedLoadCombineImpl::run() {
for (BasicBlock &BB : F) {
for (Instruction &I : BB) {
if (auto SVI = dyn_cast<ShuffleVectorInst>(&I)) {
+ // We don't support scalable vectors in this pass.
+ if (isa<ScalableVectorType>(SVI->getType()))
+ continue;
- Candidates.emplace_back(SVI->getType());
+ Candidates.emplace_back(cast<FixedVectorType>(SVI->getType()));
if (!VectorInfo::computeFromSVI(SVI, Candidates.back(), DL)) {
Candidates.pop_back();
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