[PATCH] D80091: AMDGPU/GlobalISel: Fix masked control flow with fallthrough blocks
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun May 17 13:19:36 PDT 2020
arsenm created this revision.
arsenm added reviewers: nhaehnle, foad, sameerds, kerbowa.
Herald added subscribers: hiraditya, t-tye, tpr, dstuttard, rovka, yaxunl, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.
Unlike SelectionDAGBuilder, IRTranslator omits the unconditonal branch
in fallthrough cases. Confusingly, the control flow pseudos function
in the opposite way the intrinsics are used, and the branch targets
always need to be swapped. We're inverting the target blocks, so we
need to figure out the old fallthrough block and insert a branch to
the original unconditional branch target.
https://reviews.llvm.org/D80091
Files:
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.if.xfail.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D80091.264511.patch
Type: text/x-patch
Size: 19050 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200517/c6a25ce2/attachment.bin>
More information about the llvm-commits
mailing list