[PATCH] D78721: [LLVM][AVR] Support for R_AVR_6 fixup

[Dylan McKay via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG1335737ee119: [LLVM][AVR] Support for R_AVR_6 fixup (authored by dylanmckay).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78721/new/

https://reviews.llvm.org/D78721

Files:
  llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
  llvm/test/MC/AVR/relocations.s


Index: llvm/test/MC/AVR/relocations.s
===================================================================
--- llvm/test/MC/AVR/relocations.s
+++ llvm/test/MC/AVR/relocations.s
@@ -9,6 +9,9 @@
 ; CHECK: R_AVR_LDI SYMBOL+0x3
 ldi r21, SYMBOL+3
 
+; CHECK: R_AVR_6 SYMBOL+0x4
+ldd r8, Y+SYMBOL+4
+
 ; CHECK-NEXT: R_AVR_6_ADIW FOO
 adiw r24, FOO
 
Index: llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
===================================================================
--- llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
+++ llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
@@ -141,6 +141,18 @@
   Value &= 0xfff;
 }
 
+/// 6-bit fixup for the immediate operand of the STD/LDD family of
+/// instructions.
+///
+/// Resolves to:
+/// 10q0 qq10 0000 1qqq
+static void fixup_6(const MCFixup &Fixup, uint64_t &Value,
+                    MCContext *Ctx = nullptr) {
+  unsigned_width(6, Value, std::string("immediate"), Fixup, Ctx);
+
+  Value = ((Value & 0x20) << 8) | ((Value & 0x18) << 7) | (Value & 0x07);
+}
+
 /// 6-bit fixup for the immediate operand of the ADIW family of
 /// instructions.
 ///
@@ -336,6 +348,9 @@
     Value &= 0xffff;
     break;
 
+  case AVR::fixup_6:
+    adjust::fixup_6(Fixup, Value, Ctx);
+    break;
   case AVR::fixup_6_adiw:
     adjust::fixup_6_adiw(Fixup, Value, Ctx);
     break;


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