[PATCH] D80020: [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm

Amy Kwan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri May 15 16:52:26 PDT 2020


amyk added a comment.

I believe we're also missing `IsISA3_1 = false;` in `PPCSubtarget.cpp`.



================
Comment at: llvm/lib/Target/PowerPC/PPC.td:338
+  // still exist with the exception of those we know are Power9 specific.
+  list<SubtargetFeature> P10AdditionalFeatures = [DirectivePwr10];
+  list<SubtargetFeature> P10SpecificFeatures =
----------------
Are we missing `FeatureISA3_1` in `P10AdditionalFeatures`?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80020/new/

https://reviews.llvm.org/D80020





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