[PATCH] D77767: Prevent register coalescing in functions whith setjmp

[Diogo N. Sampaio via Phabricator via llvm-commits]

dnsampaio added inline comments.


================
Comment at: llvm/test/CodeGen/ARM/no-register-coalescing-in-returnsTwice.mir:17
+# Not changed between setjmp and bar(longjmp)
+# CHECK-NOT: %{{[0-9]+}}:dpr, %[[R2]]:gpr = VLD1d32wb_fixed %[[R2]], 0,
+# CHECK: BL @_Z3barPx3S37{{.*}}
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efriedma wrote:
> rnk wrote:
> > I can't read ARM assembly well enough to tell if this is a good test or to suggest how to make it better, so I'll have to ask Eli to review.
> It should be possible to construct a shorter testcase by artificially forcing up the register pressure using inline asm clobbers.
> 
> See also http://llvm.org/docs/MIRLangRef.html?highlight=filecheck#simplifying-mir-files .
Indeed replaced most of the code in my original reproducer by the inline asm clobbering `r0 - r14` between the two function calls still gives me the same error.
And I simplified the mir as much as possible.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77767/new/

https://reviews.llvm.org/D77767