[PATCH] D80027: Trivial fix for instruction with more than one destination in modulo peeler.
Hendrik Greving via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 15 12:31:31 PDT 2020
hgreving created this revision.
hgreving added a reviewer: ThomasRaoux.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.
ThomasRaoux accepted this revision.
This revision is now accepted and ready to land.
hgreving added a comment.
Thanks
When moving an instruction into a block where it was referenced by a phi when peeling,
refer to the phi's register number and assert that the instruction has it in its destinations.
This way, it also covers instructions with more than one destination.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D80027
Files:
llvm/lib/CodeGen/ModuloSchedule.cpp
Index: llvm/lib/CodeGen/ModuloSchedule.cpp
===================================================================
--- llvm/lib/CodeGen/ModuloSchedule.cpp
+++ llvm/lib/CodeGen/ModuloSchedule.cpp
@@ -1658,8 +1658,8 @@
// we don't need the phi anymore.
if (getStage(Def) == Stage) {
Register PhiReg = MI.getOperand(0).getReg();
- MRI.replaceRegWith(MI.getOperand(0).getReg(),
- Def->getOperand(0).getReg());
+ assert(Def->findRegisterDefOperandIdx(MI.getOperand(1).getReg()) != -1);
+ MRI.replaceRegWith(MI.getOperand(0).getReg(), MI.getOperand(1).getReg());
MI.getOperand(0).setReg(PhiReg);
PhiToDelete.push_back(&MI);
}
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