[PATCH] D79482: Fix stack clash probing on the tail of dynamic allocation
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 15 09:13:06 PDT 2020
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/X86/X86FrameLowering.cpp:715
if (Offset % StackProbeSize) {
- const unsigned Opc = getSUBriOpcode(Uses64BitFramePtr, Offset);
- BuildMI(*tailMBB, tailMBB->begin(), DL, TII.get(Opc), StackPtr)
- .addReg(StackPtr)
- .addImm(Offset % StackProbeSize)
+ BuildMI(*tailMBB, tailMBB->begin(), DL, TII.get(X86::MOV64rr), StackPtr)
+ .addReg(FinalStackPtr)
----------------
This can't be MOV64rr for 32-bit. Can we use TargetOpcode::COPY?
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:31580
- const TargetRegisterClass *SizeRegClass = MRI.getRegClass(sizeVReg);
+ unsigned physSPReg = TFI.Uses64BitFramePtr ? X86::RSP : X86::ESP;
----------------
use Register instead of unsigned.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:31587
- unsigned physSPReg = TFI.Uses64BitFramePtr ? X86::RSP : X86::ESP;
+ BuildMI(*MBB, {MI}, DL, TII->get(X86::MOV64rr), TmpStackPtr)
+ .addReg(physSPReg);
----------------
This shouldn't be MOV64rr if the stack pointer is 32 bits. Can we just use TargetOpcode::COPY here?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D79482/new/
https://reviews.llvm.org/D79482
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