[PATCH] D79963: [llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC

[Jon Roelofs via Phabricator via llvm-commits]

jroelofs updated this revision to Diff 264247.
jroelofs added a comment.

Implement review feedback


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79963/new/

https://reviews.llvm.org/D79963

Files:
  llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
  llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
  llvm/test/CodeGen/AMDGPU/global-constant.ll
  llvm/test/CodeGen/AMDGPU/merge-tbuffer.mir
  llvm/test/CodeGen/AMDGPU/smrd.ll
  llvm/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll
  llvm/test/CodeGen/ARM/build-attributes.ll
  llvm/test/CodeGen/ARM/float-helpers.s
  llvm/test/CodeGen/ARM/select-imm.ll
  llvm/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll
  llvm/test/CodeGen/Mips/cconv/arguments-float.ll
  llvm/test/CodeGen/Mips/cconv/arguments-hard-float-varargs.ll
  llvm/test/CodeGen/Mips/cconv/arguments-hard-float.ll
  llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll
  llvm/test/CodeGen/Mips/cconv/arguments.ll
  llvm/test/CodeGen/Mips/cconv/return-hard-fp128.ll
  llvm/test/CodeGen/Mips/cconv/return-hard-struct-f128.ll
  llvm/test/CodeGen/Mips/countleading.ll
  llvm/test/CodeGen/Mips/divrem.ll
  llvm/test/CodeGen/Mips/dynamic-stack-realignment.ll
  llvm/test/CodeGen/Mips/inlineasm-operand-code.ll
  llvm/test/CodeGen/Mips/mips64muldiv.ll
  llvm/test/CodeGen/PowerPC/ppc64-crsave.mir
  llvm/test/CodeGen/X86/avx-cast.ll
  llvm/test/CodeGen/X86/fp-intrinsics.ll
  llvm/test/CodeGen/X86/splat-for-size.ll
  llvm/test/CodeGen/X86/sse-scalar-fp-arith.ll
  llvm/test/CodeGen/X86/vec_shift6.ll
  llvm/test/CodeGen/X86/vector-compare-combines.ll
  llvm/test/CodeGen/X86/vector-narrow-binop.ll
  llvm/test/DebugInfo/COFF/vframe-fpo.ll
  llvm/test/DebugInfo/X86/debug-info-static-member.ll
  llvm/test/FileCheck/dump-input-annotations.txt
  llvm/test/FileCheck/var-scope.txt
  llvm/test/MC/AsmParser/expr-shr.s
  llvm/test/MC/Mips/relocation-n64.s
  llvm/test/MC/Mips/relocation.s
  llvm/test/MC/RISCV/compressed-relocations.s
  llvm/test/MC/RISCV/relocations.s
  llvm/test/MC/RISCV/rv32b-aliases-valid.s
  llvm/test/MC/RISCV/rv64b-aliases-valid.s
  llvm/test/MC/RISCV/rva-aliases-valid.s
  llvm/test/MC/RISCV/rvi-aliases-valid.s
  llvm/test/Transforms/InstCombine/double-float-shrink-2.ll
  llvm/test/Transforms/LoopFusion/cannot_fuse.ll
  llvm/test/tools/llvm-objdump/ELF/dynamic-section-machine-specific.test
  llvm/test/tools/llvm-readobj/ELF/RISCV/section-types.test
  llvm/test/tools/llvm-readobj/ELF/section-types.test
  llvm/test/tools/llvm-readobj/ELF/symbol-binding.test

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