[PATCH] D77448: [PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
Roland Froese via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 14 15:15:13 PDT 2020
RolandF added inline comments.
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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:9617
+ // the base pointer. This happens with (splat (s_to_v_permuted (ld))).
+ if (LD->getMemoryVT().getSizeInBits() <= (IsFourByte ? 32 : 64))
+ Offset = 0;
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I don't think it is safe to use a load and splat for a smaller than word sized load. The larger load might now cross a page boundary.
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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:14077
+ EVT VT = OrigSToV.getValueType();
+ SDValue SToVPerm =
+ DAG.getNode(PPCISD::S_TO_V_PERMUTED, dl, VT, OrigSToV.getOperand(0));
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This code is only used on the early, conditional returns, and not on the final return. The function could be refactored such that the final return case is moved first, or the early returns could return the result of a function that generates the instruction, to prevent unused code.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D77448/new/
https://reviews.llvm.org/D77448
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