[PATCH] D79952: Add v16f64 value type

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec created this revision.
rampitec added reviewers: arsenm, craig.topper.
Herald added subscribers: kerbowa, jdoerfert, aheejin, hiraditya, kristof.beyls, tpr, nhaehnle, wdng, jvesely, dschuff.
Herald added a project: LLVM.

We need to use it to handle <16 x double> indirect indexes
in the AMDGPU BE.

The only visible change from adding it is in ARM cost model.
To me it looks reasonable. With doubling a vector size it
quadruples the cost up to the size 8 and then it did only
double it. Now it also quadruples, which seems a logical
progression to me.

Actual AMDGPU code is to follow, this is a common part, plus
load/store legalization in the AMDGPU BE not to break what
works now.


https://reviews.llvm.org/D79952

Files:
  llvm/include/llvm/CodeGen/ValueTypes.td
  llvm/include/llvm/IR/Intrinsics.td
  llvm/include/llvm/Support/MachineValueType.h
  llvm/lib/CodeGen/ValueTypes.cpp
  llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  llvm/test/Analysis/CostModel/ARM/cast.ll
  llvm/utils/TableGen/CodeGenTarget.cpp

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