[PATCH] D64193: [PowerPC] Add exception constraint to FP rounding operations

[Qing Shan Zhang via Phabricator via llvm-commits]

steven.zhang added inline comments.


================
Comment at: llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll:6587
 ; PC64LE-NEXT:    lvx 2, 0, 3
+; PC64LE-NEXT:    frin 0, 0
+; PC64LE-NEXT:    frin 0, 1
----------------
This is not right. It seems that, we are still returning the rounded constant with compiler folding which didn't respect the round mode. What we did now, is just re-run the calculation to make sure that, the hw status register is updated correctly. But the result is still wrong. 


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D64193/new/

https://reviews.llvm.org/D64193