[PATCH] D79872: [MachineVerifier] Use the for Range loop to instead llvm::any_of
Zhang Kang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 13 18:34:46 PDT 2020
ZhangKang updated this revision to Diff 263904.
ZhangKang added a comment.
Fix the format.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D79872/new/
https://reviews.llvm.org/D79872
Files:
llvm/lib/CodeGen/MachineVerifier.cpp
Index: llvm/lib/CodeGen/MachineVerifier.cpp
===================================================================
--- llvm/lib/CodeGen/MachineVerifier.cpp
+++ llvm/lib/CodeGen/MachineVerifier.cpp
@@ -168,14 +168,18 @@
// Same for a full set.
bool addRequired(const RegSet &RS) {
- return llvm::any_of(
- RS, [this](unsigned Reg) { return this->addRequired(Reg); });
+ bool Changed = false;
+ for (unsigned Reg : RS)
+ Changed |= addRequired(Reg);
+ return Changed;
}
// Same for a full map.
bool addRequired(const RegMap &RM) {
- return llvm::any_of(
- RM, [this](const auto &P) { return this->addRequired(P.first); });
+ bool Changed = false;
+ for (const auto &I : RM)
+ Changed |= addRequired(I.first);
+ return Changed;
}
// Live-out registers are either in regsLiveOut or vregsPassed.
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