[llvm] 028bfdd - [X86] Only allow f32, f64, or f80 to be used with 'f' inline assembly constraint.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2020-05-13T13:27:13-07:00
New Revision: 028bfdd8913616f7a3e57e8ef5c2a9990e528ff0

URL: https://github.com/llvm/llvm-project/commit/028bfdd8913616f7a3e57e8ef5c2a9990e528ff0
DIFF: https://github.com/llvm/llvm-project/commit/028bfdd8913616f7a3e57e8ef5c2a9990e528ff0.diff

LOG: [X86] Only allow f32, f64, or f80 to be used with 'f' inline assembly constraint.

Avoids crash when using i128. Gives better error than
'scalar-to-vector conversion failed' for other types.

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp
    llvm/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 34431fda1be6..7cfdcf22ac81 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -48541,7 +48541,9 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
         return std::make_pair(0U, &X86::RFP32RegClass);
       if (VT == MVT::f64 && !isScalarFPTypeInSSEReg(VT))
         return std::make_pair(0U, &X86::RFP64RegClass);
-      return std::make_pair(0U, &X86::RFP80RegClass);
+      if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f80)
+        return std::make_pair(0U, &X86::RFP80RegClass);
+      break;
     case 'y':   // MMX_REGS if MMX allowed.
       if (!Subtarget.hasMMX()) break;
       return std::make_pair(0U, &X86::VR64RegClass);

diff  --git a/llvm/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll b/llvm/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll
index a6f9f9a29ea8..79084935541d 100644
--- a/llvm/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll
+++ b/llvm/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll
@@ -12,3 +12,10 @@ define void @fp80(x86_fp80) {
   tail call void asm sideeffect "", "r"(x86_fp80 %0)
   ret void
 }
+
+; CHECK: error: couldn't allocate input reg for constraint 'f'
+define void @f_constraint_i128(i128* %0) {
+  %2 = load i128, i128* %0, align 16
+  tail call void asm sideeffect "", "f"(i128 %2)
+  ret void
+}