[PATCH] D79829: [mlir][Affine][NFCI]: Introduce affine memory interfaces
Uday Bondhugula via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 13 11:57:59 PDT 2020
bondhugula added a comment.
For the names AffineReadLikeOpInterface, AffineWriteLikeOpInterface, we could even consider dropping "Like" from it. It has become standard to use "Like" in interfaces because the prefixes are often the names of the ops. But here, "read" and "write" are already capturing the "like" part unlike say LoopLikeOp where you have a LoopOp and so it has to be LoopLikeOp. So, if you/others are fine with it, you could go for AffineReadOpInterface, AffineWriteOpInterface. DMAs, load/stores and vector load/stores - all read/write data.
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https://reviews.llvm.org/D79829/new/
https://reviews.llvm.org/D79829
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