[PATCH] D76884: [AMDGPU] Implement -amdgpu-spill-cfi-saved-regs

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:776
+            ReturnAddressSpill[0].VGPR)
+        .addReg(TRI.getSubReg(ReturnAddressReg, TRI.getSubRegFromChannel(0)))
+        .addImm(ReturnAddressSpill[0].Lane)
----------------
You can just hardcode AMDGPU::sub0 instead of TRI.getSubRegFromChannel(0)


================
Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:781
+            ReturnAddressSpill[1].VGPR)
+        .addReg(TRI.getSubReg(ReturnAddressReg, TRI.getSubRegFromChannel(1)))
+        .addImm(ReturnAddressSpill[1].Lane)
----------------
AMDGPU::sub1


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D76884/new/

https://reviews.llvm.org/D76884