[PATCH] D79803: [AArch64][SVE] Add patterns for VSELECT of immediate with a variable.
Francesco Petrogalli via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 13 07:00:15 PDT 2020
fpetrogalli accepted this revision.
fpetrogalli added a comment.
This revision is now accepted and ready to land.
LGTM, with a nit on a comment that my slow brain still struggle to understand! :)
Thanks,
Francesco
================
Comment at: llvm/test/CodeGen/AArch64/sve-vselect-imm.ll:340
+
+; TODO: We could actually use something like "sel z0.b, p0/z, #-128" if the
+; odd bits of the predicate are zero.
----------------
Nit: there is no "SEL" instruction that operates on immediate values in SVE.
Please consider expanding this comment explaining why you can use #-128 instead of #128, and why the condition "if the odd bits of the predicate are zero" is needed for this to hold.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D79803/new/
https://reviews.llvm.org/D79803
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