[PATCH] D79074: [PowerPC] Respect SDNodeFlags in lowering SELECT_CC

[Qing Shan Zhang via Phabricator via llvm-commits]

steven.zhang added inline comments.


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Comment at: llvm/test/CodeGen/PowerPC/scalar_cmp.ll:129
 ; NO-FAST-P9:       # %bb.0: # %entry
-; NO-FAST-P9-NEXT:    fcmpu cr0, f1, f2
-; NO-FAST-P9-NEXT:    beq cr0, .LBB2_2
-; NO-FAST-P9-NEXT:  # %bb.1: # %entry
-; NO-FAST-P9-NEXT:    fmr f3, f4
-; NO-FAST-P9-NEXT:  .LBB2_2: # %entry
-; NO-FAST-P9-NEXT:    fmr f1, f3
+; NO-FAST-P9-NEXT:    xssubsp f0, f2, f1
+; NO-FAST-P9-NEXT:    xssubsp f1, f1, f2
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qiucf wrote:
> steven.zhang wrote:
> > These instructions sequence seem terrible to me, as we didn't have INF and NAN for this case. But it is not relative with your change, maybe, worth to take a look.
> hmm.. This is expected result since we propagate these flags to SELECT_CC now. Do you mean that `sub-sub` here is worse than `cmp-beq-fmr`?
I think so, we have two subs + two fsel. Not sure why we do it that way.


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  https://reviews.llvm.org/D79074/new/

https://reviews.llvm.org/D79074