[PATCH] D79817: LoadStoreVectorizer: Match nested adds to prove vectorization is safe

Volkan Keles via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 12 17:48:23 PDT 2020


volkan marked an inline comment as done.
volkan added inline comments.


================
Comment at: llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-i8-nested-add.ll:11
+
+define void @load_v4s8_nested_add(i32 %v0, i32 %v1, i32 %v3, i8* %src, <4 x i8>* %dst) {
+; CHECK-LABEL: @load_v4s8_nested_add(
----------------
arsenm wrote:
> Can you reduce this any further?
> 
> Also could use some negative cases where the flags don't match up
Do you mean reducing the number of loads? I added 4 loads to make sure we test different patterns.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79817/new/

https://reviews.llvm.org/D79817





More information about the llvm-commits mailing list