[PATCH] D79537: Add NoMerge MIFlag to avoid MIR branch folding
Zequan Wu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon May 11 17:18:48 PDT 2020
zequanwu updated this revision to Diff 263312.
zequanwu added a comment.
Herald added subscribers: luismarques, apazos, sameer.abuasal, pzheng, s.egerton, lenary, Jim, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, MaskRay, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, kbarton, nemanjai.
Handle `nomerge` flag in `LowerCall` at targets AArch64, ARM, PowerPC, RISCV, and add test cases for each target.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D79537/new/
https://reviews.llvm.org/D79537
Files:
llvm/include/llvm/CodeGen/MachineInstr.h
llvm/include/llvm/CodeGen/SelectionDAG.h
llvm/include/llvm/CodeGen/TargetLowering.h
llvm/lib/CodeGen/BranchFolding.cpp
llvm/lib/CodeGen/MIRPrinter.cpp
llvm/lib/CodeGen/MachineInstr.cpp
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.h
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/AArch64/nomerge.ll
llvm/test/CodeGen/ARM/nomerge.ll
llvm/test/CodeGen/PowerPC/nomerge.ll
llvm/test/CodeGen/RISCV/nomerge.ll
llvm/test/CodeGen/X86/nomerge.ll
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