[PATCH] D75098: Add TCOPY, a terminator form of the COPY instr
Bill Wendling via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat May 9 03:41:08 PDT 2020
void updated this revision to Diff 263010.
void added a comment.
Fix formatting and clang-tidy warnings.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D75098/new/
https://reviews.llvm.org/D75098
Files:
llvm/include/llvm/CodeGen/MachineBasicBlock.h
llvm/include/llvm/CodeGen/MachineInstr.h
llvm/include/llvm/Support/TargetOpcodes.def
llvm/include/llvm/Target/Target.td
llvm/lib/CodeGen/DetectDeadLanes.cpp
llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
llvm/lib/CodeGen/GlobalISel/Utils.cpp
llvm/lib/CodeGen/MachineBasicBlock.cpp
llvm/lib/CodeGen/MachineInstr.cpp
llvm/lib/CodeGen/MachineSink.cpp
llvm/lib/CodeGen/MachineVerifier.cpp
llvm/lib/CodeGen/PeepholeOptimizer.cpp
llvm/lib/CodeGen/ReachingDefAnalysis.cpp
llvm/lib/CodeGen/RegAllocFast.cpp
llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/lib/Target/AArch64/AArch64CallLowering.cpp
llvm/lib/Target/AArch64/AArch64FastISel.cpp
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/lib/Target/Hexagon/BitTracker.cpp
llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp
llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp
llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp
llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
llvm/lib/Target/Hexagon/RDFCopy.cpp
llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
llvm/lib/Target/X86/X86DomainReassignment.cpp
llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
llvm/lib/Target/X86/X86FloatingPoint.cpp
llvm/lib/Target/X86/X86InstrInfo.cpp
llvm/test/CodeGen/AArch64/callbr-asm-label.ll
llvm/test/CodeGen/SystemZ/asm-20.ll
llvm/test/CodeGen/X86/callbr-asm-label-addr.ll
llvm/test/CodeGen/X86/callbr-asm-outputs-tcopy-spilling.ll
llvm/test/CodeGen/X86/callbr-asm-outputs.ll
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