[PATCH] D79521: [RISCV] Add SiFive's interrupt modes

[Ana Pazos via Phabricator via llvm-commits]

apazos updated this revision to Diff 262982.
apazos added a comment.

Remove wrong setting of  Framesetup flags

WIP - requires adding a flag to control clic mode version. Maybe something similar to what is being proposed in binutils. 
https://sourceware.org/pipermail/binutils/2020-April/110714.html
New options: -mpriv-spec=[1p9|1p9p1|1p10|1p11] -misa-spec = [2p0|2p1|2p2|20190608|20191213]


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79521/new/

https://reviews.llvm.org/D79521

Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Basic/AttrDocs.td
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/Sema/riscv-interrupt-attr.c
  clang/test/Sema/riscv-sifive-interrupt-attr.c
  llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
  llvm/test/CodeGen/RISCV/sifive-interrupt-attr.ll

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