[PATCH] D79598: [AArch64][SVE] Add patterns for VSELECT of immediates.

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

> Do you mean cases like select <vscale x 2 x i1> %p, <vscale x 2 x i64> zeroinitializer,  <vscale x 2 x i64> %three? If that the case, the "merging" version of CPY , where %three is allocated to the dest register, should do it? CPY <Zd>.<T>, <Pg>/M, <R><n|SP>.

I was more specifically thinking of the case where %p is something like an icmp, where we can potentially rewrite the operation to produce an inverted result for free.  Otherwise, yes, we can use merging CPY.


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https://reviews.llvm.org/D79598