[PATCH] D76158: Add inline assembly load hardening mitigation for Load Value Injection (LVI) on X86 [6/6]

[Matthew Riley via Phabricator via llvm-commits]

mattdr added a comment.

In D76158#2026209 <https://reviews.llvm.org/D76158#2026209>, @craig.topper wrote:

> Isn't that binutils patch adding IRET (opcode 0xcf)? LRET(opcodes 0xca and 0xcb) were already there.


I admit I don't know the opcodes offhand, but I agree with your reading of the code. From what I can see that commit **does** seem to be the first time `lret` appears in comments, and it appears to add a number of `lret` test cases.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D76158/new/

https://reviews.llvm.org/D76158