[PATCH] D70379: [AMDGPU] Reserving VGPR for future SGPR Spill
    Saiyedul Islam via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Thu May  7 10:47:21 PDT 2020
    
    
  
saiislam marked an inline comment as done.
saiislam added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp:315
 
-    if (VGPRIndex == 0) {
+    if (VGPRIndex == 0 && !FuncInfo->VGPRReservedForSGPRSpill) {
       LaneVGPR = TRI->findUnusedRegister(MRI, &AMDGPU::VGPR_32RegClass, MF);
----------------
cdevadas wrote:
> Doesn't it limit the total allowable SGPR spills to 64? 
> What happens if more than 64 callee-saved SGPRs used in the functions?
Yes, this patch is limited to 64 SGPR spills only.
Does it make sense to handle that case in a separate patch?
Repository:
  rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70379/new/
https://reviews.llvm.org/D70379
    
    
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