[PATCH] D79492: [RISCV] Improve constant materialization

[Luís Marques via Phabricator via llvm-commits]

luismarques added a comment.

In D79492#2024394 <https://reviews.llvm.org/D79492#2024394>, @asb wrote:

> 1. I don't want to unreasonably expand the scope of this patch, but I do note that at least the srli transformation may be beneficial on RV32 as well for code size (still two instructions, but more compressible). Did you consider adding this or look at other RVC considerations?
> 2. Although it has the advantage that mistakes in edge cases etc won't lead to regressions in terms of longer instruction sequences, I'm slightly wary of the "generate and see if it's shorter" approach. Though perhaps this is going to come way down the list on any compile-time profiling vs all the other analyses+transformations being done. Any thoughts on this?


Originally I started by writing the optimizations in terms of "If this condition matches, do this", and I was rather please with the results, as the code was quite straightforward, clean and efficient. I was also trying keep the original structure of the materialization code, and just add those tweaks. But as I started trying to cover the last cases it kept getting hairier and hairier. Since that approach didn't backtrack it was very easy for those tweaks to interfere with each other, or to get ever more convoluted preconditions to avoid doing so. Maybe I was just tired and it shouldn't be that difficult. Eventually I decided to cut my losses and move some of the optimizations to the "give it a try" approach, but the other ones kept interfering, so eventually I ended up moving them all to the try approach. I have several ideas on how this could be improved, which would also address compressibility issues, but I wanted to get this baseline improvement merged.


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