[PATCH] D62368: Add vendor identity check for Hygon Dhyana processor in Scudo

Jinke Fan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 6 20:27:49 PDT 2020


fanjinke updated this revision to Diff 262529.
fanjinke retitled this revision from "Add support for Hygon Dhyana processor" to "Add vendor identity check for Hygon Dhyana processor in Scudo".
fanjinke edited the summary of this revision.
fanjinke added a comment.

Changelog:
v3:
Remove the changes in cpuid.h that have already been committed in [1].

[1]: https://reviews.llvm.org/D78874


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62368/new/

https://reviews.llvm.org/D62368

Files:
  compiler-rt/lib/scudo/scudo_utils.cpp
  compiler-rt/lib/scudo/standalone/checksum.cpp


Index: compiler-rt/lib/scudo/standalone/checksum.cpp
===================================================================
--- compiler-rt/lib/scudo/standalone/checksum.cpp
+++ compiler-rt/lib/scudo/standalone/checksum.cpp
@@ -31,6 +31,13 @@
 #define bit_SSE4_2 bit_SSE42 // clang and gcc have different defines.
 #endif
 
+#ifndef signature_HYGON_ebx // They are not defined in the gcc.
+/* HYGON:   "HygonGenuine" */
+#define signature_HYGON_ebx 0x6f677948
+#define signature_HYGON_edx 0x6e65476e
+#define signature_HYGON_ecx 0x656e6975
+#endif
+
 bool hasHardwareCRC32() {
   u32 Eax, Ebx = 0, Ecx = 0, Edx = 0;
   __get_cpuid(0, &Eax, &Ebx, &Ecx, &Edx);
@@ -39,7 +46,10 @@
                        (Ecx == signature_INTEL_ecx);
   const bool IsAMD = (Ebx == signature_AMD_ebx) && (Edx == signature_AMD_edx) &&
                      (Ecx == signature_AMD_ecx);
-  if (!IsIntel && !IsAMD)
+  const bool IsHygon = (Ebx == signature_HYGON_ebx) &&
+                       (Edx == signature_HYGON_edx) &&
+                       (Ecx == signature_HYGON_ecx);
+  if (!IsIntel && !IsAMD && !IsHygon)
     return false;
   __get_cpuid(1, &Eax, &Ebx, &Ecx, &Edx);
   return !!(Ecx & bit_SSE4_2);
Index: compiler-rt/lib/scudo/scudo_utils.cpp
===================================================================
--- compiler-rt/lib/scudo/scudo_utils.cpp
+++ compiler-rt/lib/scudo/scudo_utils.cpp
@@ -62,6 +62,14 @@
 # ifndef bit_SSE4_2
 #  define bit_SSE4_2 bit_SSE42  // clang and gcc have different defines.
 # endif
+
+#ifndef signature_HYGON_ebx // They are not defined in the gcc.
+/* HYGON:   "HygonGenuine" */
+#define signature_HYGON_ebx 0x6f677948
+#define signature_HYGON_edx 0x6e65476e
+#define signature_HYGON_ecx 0x656e6975
+#endif
+
 bool hasHardwareCRC32() {
   u32 Eax, Ebx, Ecx, Edx;
   __get_cpuid(0, &Eax, &Ebx, &Ecx, &Edx);
@@ -71,7 +79,10 @@
   const bool IsAMD = (Ebx == signature_AMD_ebx) &&
                      (Edx == signature_AMD_edx) &&
                      (Ecx == signature_AMD_ecx);
-  if (!IsIntel && !IsAMD)
+  const bool IsHygon = (Ebx == signature_HYGON_ebx) &&
+                       (Edx == signature_HYGON_edx) &&
+                       (Ecx == signature_HYGON_ecx);
+  if (!IsIntel && !IsAMD && !IsHygon)
     return false;
   __get_cpuid(1, &Eax, &Ebx, &Ecx, &Edx);
   return !!(Ecx & bit_SSE4_2);


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