[PATCH] D74729: [FPEnv] Intrinsic for setting rounding mode

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/docs/LangRef.rst:18146-18150
+    0  - toward zero
+    1  - to nearest, ties to even
+    2  - toward positive infinity
+    3  - toward negative infinity
+    4  - to nearest, ties away from zero
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arsenm wrote:
> arsenm wrote:
> > sepavloff wrote:
> > > RKSimon wrote:
> > > > arsenm wrote:
> > > > > I'm wondering if this should be more opaque, and broader for the entire FP environment (not just the rounding mode). For AMDGPU we have a number of additional bits in the FP environment. We also have the denormal mode, enabling FP exceptions, and a few more exotic target specific FP mode bits.
> > > > @arsenm Would these extra bits be exclusive modes or would you need this to support target specific mode combos?
> > > > I'm wondering if this should be more opaque, and broader for the entire FP environment (not just the rounding mode). 
> > > 
> > > C library defined function `fesetmode`, which sets all control modes, not just rounding. It make sense to introduce intrinsic for it, which would serve these purposes.
> > We have the rounding mode controls as presented here, however they are broken down by FP type. We can separately set the rounding mode for f32 and f64/f16, so there are two different settings. We also have the denormal mode, for inputs and outputs, also broken down by type in the same way. The denormal handling and per-type handling I think deserve consideration here
> > 
> > We have 2 additional target specific FP bits nothing else would need to really think about, but it would be nice if you could set the exact mode you want in a single intrinsic call. I'm less interested in these though
> Oh, we also have a bit to turn on/off fp exceptions which is probably generally interesting
And by a bit, I mean a mask of bits for different FP exception types


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https://reviews.llvm.org/D74729