[PATCH] D79523: [RISCV] Support Constant Pools in Load/Store Peephole

Sam Elliott via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 6 15:19:57 PDT 2020


lenary created this revision.
lenary added reviewers: luismarques, asb.
Herald added subscribers: llvm-commits, evandro, apazos, sameer.abuasal, pzheng, s.egerton, Jim, benna, psnobl, jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, MaskRay, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, hiraditya.
Herald added a project: LLVM.
luismarques accepted this revision.
luismarques added a comment.
This revision is now accepted and ready to land.

LGTM. Nice to see this extraneous `addi` go!


RISC-V uses a post-select peephole pass to optimise
`(load/store (ADDI $reg, %lo(addr)), 0)` into `(load/store $reg, %lo(addr))`.
This peephole wasn't firing for accesses to constant pools, which is how we
materialise most floating point constants.

This adds support for the constantpool case, which improves code generation for
lots of small FP loading examples. I have not added any tests because this
structure is well-covered by the `fp-imm.ll` testcases, as well as almost
all other uses of floating point constants in the RISC-V backend tests.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D79523

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
  llvm/test/CodeGen/RISCV/calling-conv-ilp32f-ilp32d-common.ll
  llvm/test/CodeGen/RISCV/codemodel-lowering.ll
  llvm/test/CodeGen/RISCV/double-imm.ll
  llvm/test/CodeGen/RISCV/double-previous-failure.ll
  llvm/test/CodeGen/RISCV/float-imm.ll
  llvm/test/CodeGen/RISCV/fp-imm.ll

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