[PATCH] D76066: [ARM][MachineOutliner] Add Machine Outliner support for ARM

[Eli Friedman via Phabricator via llvm-commits]

efriedma accepted this revision.
efriedma added a comment.

LGTM with one minor comment



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Comment at: llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp:5607
+  // * Register R12(IP),
+  // * Condition codes (and thus the CPSR register)
+  //
----------------
yroux wrote:
> efriedma wrote:
> > If you control all the instructions that execute, you don't need to worry about what the procedure call standard says.  You do need to worry about linker veneers if the outlined function is in a different section, though.
> > 
> > So you need to worry about `R12`/`CPSR` on entry to the outlined function, but not on exit from the outlined function.
> Yes I agree and it is what is done here, I put the same comment as what was done on AArch64 to explain where it comes from, but as it is mentioned below we remove the candidate when these registers are live into or across, which means that we can outline cases where def and use are inside the outlined region or the def inside and the use after the exit as you said.
> 
> I've modify the machine-outliner-unsafe-registers.mir test in the update version I'll submit to exhibit this.
Pleas clarify the comment to explain why the procedure call standard is relevant.


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https://reviews.llvm.org/D76066