[PATCH] D78206: [Target][ARM] Make Low Overhead Loops coexist with VPT blocks
Sam Parker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 6 08:02:54 PDT 2020
samparker added inline comments.
================
Comment at: llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp:263
+ if (Def->getParent() == MI->getParent())
+ if (getVPTInstrPredicate(*Def) == ARMVCC::None)
+ return false;
----------------
I feel like this will only be safe if we're still guaranteeing that any predicated instruction is predicated upon the VCTP. I'm concerned about some code that may look llike this:
```
loop.ph:
a = ...
b = ...
c = ...
n = ...
z = ...
DLS
loop:
VCTP
VPTT z, n
VSTRT
VPTTTT a, b
VLDRT d
VLDRT e
VADDT z, e, d
LE loop
```
Is it possible now to have a VCTP in the loop with nothing actually predicated upon it?
================
Comment at: llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp:859
- // Start a new vpt block when we discover a vpt.
- if (MI->getOpcode() == ARM::MVE_VPST) {
VPTBlocks.emplace_back(MI, CurrentPredicate);
CurrentBlock = &VPTBlocks.back();
----------------
I doubt CurrentPredicate is correct here as a VPT would be generating its own, maybe it should be cleared..?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D78206/new/
https://reviews.llvm.org/D78206
More information about the llvm-commits
mailing list