[PATCH] D79316: [CodeGen] Make logic of resultsCompatible clearer
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 5 12:58:34 PDT 2020
efriedma accepted this revision.
efriedma added a comment.
This revision is now accepted and ready to land.
LGTM with one minor comment.
================
Comment at: llvm/lib/CodeGen/CallingConvLower.cpp:281
+ if ( // Must both be in registers, or both in memory
+ (Loc1.isRegLoc() != Loc2.isRegLoc()) ||
+ // Must fill the same part of their locations
----------------
Don't need parentheses around each compare.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D79316/new/
https://reviews.llvm.org/D79316
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