[PATCH] D79193: [AArch64][SVE] Implement lowering for SIGN_EXTEND etc. of SVE predicates.

[Francesco Petrogalli via Phabricator via llvm-commits]

fpetrogalli accepted this revision.
fpetrogalli marked an inline comment as done.
fpetrogalli added a comment.

LGTM!

Thank you



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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:998-999
     return MVT::i32;
+  if (VT.isScalableVector())
+    return EVT::getVectorVT(C, MVT::i1, VT.getVectorElementCount());
   return VT.changeVectorElementTypeToInteger();
----------------
efriedma wrote:
> fpetrogalli wrote:
> > I am not sure if it is possible, but is this change tested anywhere?
> sve-fcmp.ll fails without this change.
Thanks for explaining!


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https://reviews.llvm.org/D79193