[PATCH] D78764: [RISCV] Update debug scratch register names
Pengxuan Zheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 5 09:08:59 PDT 2020
This revision was automatically updated to reflect the committed changes.
Closed by commit rG85aff8a4e49d: [RISCV] Update debug scratch register names (authored by pzheng).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D78764/new/
https://reviews.llvm.org/D78764
Files:
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/lib/Target/RISCV/RISCVSystemOperands.td
llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h
llvm/test/MC/RISCV/machine-csr-names.s
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